FIG. 1 illustrates a backside illuminated (“BSI”) image sensor 100 including a photodiode (“PD”) region 105 disposed within an epitaxial (“epi”) layer 110. BSI image sensor 100 is photosensitive to light incident upon the backside of the sensor die. Pixel circuitry for operation of the BSI image sensor is formed over a well 115. Only the transfer transistor and the reset transistor of the pixel circuitry are illustrated. A first metal layer M1 for coupling to the gates of the transfer and reset transistors is disposed within an inter-metal dielectric layer 120.
Backside processing during fabrication of a BSI image sensor can raise the backside surface temperature greatly (e.g., in excess of 1000 C), however for a thick P− epi layer 110, the high temperatures dissipate quickly into the bulk of the silicon. When the silicon is thin, the insulation from inter-metal dielectric layer 120 and the remainder of the back-end-of-the-line (“BEOL”) may cause a significant increase in the temperature of epi layer 110, which can result in deleterious effects, such as dopant diffusion at temperatures greater than 800 C and/or BEOL metal deterioration/melting at temperatures greater than 400 C. This problem may be solved by using a thicker final epi layer 110, which can be produced by removing only a portion of the bulk substrate during the backside thinning process. Retaining a thick layer of silicon between the backside and the front side places the high temperature backside surface further away from the dopant profiles and metal/silicide contacts on the front side. However, increasing this thickness results in increased electrical crosstalk between adjacent pixels in an image sensor array.
Difficulties associated with the fabrication of BSI CMOS image sensors (“CIS”) include: 1) implanted dopants penetrating too deep and harming the quantum efficiency of the device at short wavelengths, 2) activating all backside dopants to avoid/reduce unactivated defects, and 3) melting the substrate surface with a high energy LASER anneal, which gives rise to surface defects. These defects or surface states can result in high dark current and high white pixel counts. The typical BSI CIS has dark current levels that are over 100 times greater than that of a front side illuminated CIS.